The present invention relates to an insulated gate type field effect transistor (hereinafter referred to as IGFET), and more particularly to an IGFET which has a silicon gate electrode.
IGFET's have heretofore been extensively used in which the source and drain regions are effectively formed by injecting ions using the silicon gate electrode as a mask.
In the IGFET's of the conventional art, however, the silicon gate electrode has such a cross-sectional shape that the length of its bottom surface attached to the gate insulating film on the semiconductor substrate is the same as, or is slightly greater than, the length of the opposite surface, i.e., of the upper surface thereof. That is, the silicon gate electrode according to the conventional art has an rectangular shape or a trapezoidal shape in cross section. Therefore, if the source and drain regions are formed by injecting impurities of the conductivity type opposite to that of the semiconductor substrate into the semiconductor substrate using the silicon gate electrode as a mask, followed by the heat treatment to forcibly diffuse the injected impurities, that is drive-in operation, the source and drain regions overlap the bottom surface of the silicon gate electrode which is contacting to the gate insulating film. Therefore, the coupling capacity increases between the silicon gate electrode and the source and drain regions to hinder high-speed operation.
In order to reduce the coupling capacity, therefore, it had been attempted to minimize the depth of the source-drain diffusion layer to reduce the expansion in the lateral directions. Despite such efforts, however, overlapping devolops by an amount corresponding to the depth of the source-drain diffusion layer. Further, if the depth is reduced, curvature at corner portions of the source and drain regions becomes steep, and the breakdown voltage decreases between the source or drain region and the substrate.
To improve the above-mentioned conventional art, there has been proposed a method in which a mask consisting of a photoresist or silicon dioxide (SiO.sub.2) used for shaping the gate electrode is not removed but is used also as a mask for injecting ions to form the source and drain regions. This method makes it possible to inject impurity ions into places slightly separated away from the gate electrode. Therefore, when the source and drain regions are formed by the subsequent step of forced diffusion, overlapping between the gate electrode and the source-drain regions can be reduced, thereby to decrease the coupling capacity.
According to this method, however, the source and drain are usually formed by injecting ions at high concentrations under the applications of large energy. Therefore, when the photoresist is used as a mask for this method, after the ion injection process the photoresist mask is hardly removed. When SiO.sub.2 is used, on the other hand, the SiO.sub.2 film must be formed to a considerably large thickness. Thus, difficulty is involved for forming the mask, and manufacturing steps tend to become complicated.